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The spring scheduling coprocessor: a scheduling accelerator.

, , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 7 (1): 38-47 (1999)

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Node merging: A transformation on bit-level dependence graphs for efficient VLSI array design., and . ASAP, page 442-453. IEEE, (1993)Modeling and Experimental Demonstration of Accelerated Self-Healing Techniques., , and . DAC, page 171:1-171:6. ACM, (2014)Repeater and current-sensing hybrid circuits for on-chip interconnects., and . ACM Great Lakes Symposium on VLSI, page 269-272. ACM, (2003)Boosters for driving long on-chip interconnects: design issues, interconnect synthesis and comparison with repeaters., and . ISPD, page 204-211. ACM, (2001)Leakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems., and . ISCAS, page 252-255. IEEE, (2008)Temperature measurement in Content Addressable Memory cells using bias-controlled VCO., and . SoCC, page 147-150. IEEE, (2008)Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption., , and . FPGA, page 220. ACM, (2000)Low voltage sensing techniques and secondary design issues for sub-90nm caches., , , , , and . ESSCIRC, page 413-416. IEEE, (2003)Low power digital design in FPGAs: a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption., , and . ISCAS, page 561-564. IEEE, (2000)Variation Aware Design of Post-Silicon Tunable Clock Buffer., and . ISVLSI, page 1-6. IEEE Computer Society, (2014)