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Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators.

, , , , , , and . ICCAD, page 1-9. IEEE, (2023)

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System-level design space exploration for three-dimensional (3D) SoCs., , , and . CODES+ISSS, page 385-388. ACM, (2011)A low-power phase change memory based hybrid cache architecture., , , , , , and . ACM Great Lakes Symposium on VLSI, page 395-398. ACM, (2008)Cost-aware three-dimensional (3D) many-core multiprocessor design., , and . DAC, page 126-131. ACM, (2010)Core vs. uncore: the heart of darkness., , , , , and . DAC, page 121:1-121:6. ACM, (2015)Energy harvesting based on thermodynamic cycle in ferroelectric P(VDF-TrFE-CFE)., , , , , and . ICSAI, page 155-159. IEEE, (2016)A novel criticality computation method in statistical timing analysis., , and . DATE, page 1611-1616. EDA Consortium, San Jose, CA, USA, (2007)Future memory and interconnect technologies.. DATE, page 964-969. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Minimizing leakage power in aging-bounded high-level synthesis with design time multi-Vth assignment., , , and . ASP-DAC, page 689-694. IEEE, (2010)Parametric yield driven resource binding in behavioral synthesis with multi-Vth/Vdd library., , , and . ASP-DAC, page 781-786. IEEE, (2010)System-level cost analysis and design exploration for three-dimensional integrated circuits (3D ICs)., and . ASP-DAC, page 234-241. IEEE, (2009)