( en | de | ru )

 

Disambiguation of "Dandache, Abbas"

Author of the publication

copydeleteadd this publication to your clipboard
A pure hardware k-SAT solver architecture for FPGA based on generic tree-search.

, , , , and . ICM, page 1-5. IEEE, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Abbas Abbas

Mohammed Jawad Abbas

Djamschid Abbassian

Bassim Abbassi

Raya Abbas

 

Other publications of authors with the same name

A high throughput configurable parallel encoder architecture for Quasi-Cyclic Low-Density Parity-Check Codes., , , and . IOLTS, page 163-166. IEEE, (2013)Performance evaluation of SVC coding using MPLP-DVB-T2 for mobile and fixed reception., , , , , and . BMSB, page 1-6. IEEE, (2012)Performance evaluation of distributed Tarokh SFBC and Alamouti MISO for SFN DVB-T2 broadcast networks., , , , and . ICECS, page 583-586. IEEE, (2011)Bearing fault diagnosis based on Alpha-stable distribution feature extraction and wSVM classifier., , , , , and . ICM, page 277-280. IEEE, (2015)A pure hardware k-SAT solver architecture for FPGA based on generic tree-search., , , , and . ICM, page 1-5. IEEE, (2017)Loopback output router for reliable Network on Chip., , , and . IOLTS, page 206-207. IEEE Computer Society, (2011)A dependable and dynamic network on chip suitable for FPGA-based reconfigurable systems., , , , and . ReCoSoC, page 1-6. IEEE, (2011)Experimental performance of mobile DVB-T2 in SFN and distributed MISO network., , , , and . ICT, page 1-5. IEEE, (2012)A New Efficient and Reliable Dynamically Reconfigurable Network-on-Chip., , , and . J. Electr. Comput. Eng., (2012)Évaluations électriques et temporelles des PLA complexes COMPLETE : COM plex PLA Electrical and Temporal Evaluator.. Grenoble Institute of Technology, France, (1983)