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HARP: Practically and Effectively Identifying Uncorrectable Errors in Memory Chips That Use On-Die Error-Correcting Codes., , and . MICRO, page 623-640. ACM, (2021)PUMA: Efficient and Low-Cost Memory Allocation and Alignment Support for Processing-Using-Memory Architectures., , , and . CoRR, (2024)DaPPA: A Data-Parallel Framework for Processing-in-Memory Architectures., , , , and . CoRR, (2023)Methodologies, Workloads, and Tools for Processing-in-Memory: Enabling the Adoption of Data-Centric Architectures., , , and . ISVLSI, page 261-266. IEEE, (2022)Employing classification-based algorithms for general-purpose approximate computing., , , , and . DAC, page 70:1-70:6. ACM, (2018)ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation., , , , , , , , and . USENIX Security Symposium, USENIX Association, (2024)SIMDRAM: A Framework for Bit-Serial SIMD Processing Using DRAM., , , , , , , , , and . CoRR, (2020)SIMDRAM: An End-to-End Framework for Bit-Serial SIMD Computing in DRAM., , , , , , , , , and . CoRR, (2021)NIM: An HMC-Based Machine for Neuron Computation., , , and . ARC, volume 10216 of Lecture Notes in Computer Science, page 28-35. (2017)Polynesia: Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Co-Design., , , and . ICDE, page 2997-3011. IEEE, (2022)