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Design Space Exploration with Deterministic Latency Guarantees for Crossbar MPSoC Architectures.

, , , , , , and . ICC, page 1-7. IEEE, (2020)

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Flexible front-end processing for software defined radio applications using application specific instruction-set processors., , , , , , and . DASIP, page 1-8. IEEE, (2012)Execution Trace Analysis for a Precise Understanding of Latency Violations., , and . MoDELS, page 123-133. IEEE, (2021)Reconfigurable DSP Architectures for SDR Applications., , , and . ICECS, page 971-974. IEEE, (2007)Evaluation of ASIPs Design with LISATek., , and . SAMOS, volume 5114 of Lecture Notes in Computer Science, page 177-186. Springer, (2008)Efficient Scheduling of FPGAs for Cloud Data Center Infrastructures., , , and . DSD, page 57-64. IEEE, (2020)Fast Simulation Techniques for Design Space Exploration., , and . TOOLS (47), volume 33 of Lecture Notes in Business Information Processing, page 308-327. Springer, (2009)Modeling the Trade-off Between Security and Performance to Support the Product Life Cycle., , , , , , , , , and . MECO, page 1-6. IEEE, (2019)Performance optimizations of integrity checking based on Merkle trees., , and . HASP@ISCA, page 10:1-10:4. ACM, (2015)CMOS Structures Suitable for Secured Hardware., , , , and . DATE, page 1414-1415. IEEE Computer Society, (2004)Silicon-level Solutions to Counteract Passive and Active Attacks., , , , and . FDTC, page 3-17. IEEE Computer Society, (2008)