( en | de | ru )

 

Disambiguation of "Beckmann, Karsten"

Author of the publication

copydeleteadd this publication to your clipboard
Bilayer Ga-Sb Phase Change Memory with Intermediate Resistance State.

, , , , , , , , , , and . DRC, page 1-2. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Karsten Beckmann

Karsten Beckmann

Karsten Frenner

Numerische Simulation von Diffusionsproblemen mit diskreten Differenzialformen. Uni Stuttgart, (2009)

Helmut Beckmann

Rainer Beckmann

 

Other publications of authors with the same name

Design techniques for in-field memristor forming circuits., , , and . MWSCAS, page 1224-1227. IEEE, (2017)Optimization of Switching Metrics for CMOS Integrated HfO2 based RRAM Devices on 300 mm Wafer Platform., , , , , and . IMW, page 1-4. IEEE, (2021)Accurate Inference with Inaccurate RRAM Devices: Statistical Data, Model Transfer, and On-line Adaptation., , , , , , , and . DAC, page 1-6. IEEE, (2020)An extendable multi-purpose 3D neuromorphic fabric using nanoscale memristors., , , , , and . CISDA, page 1-8. IEEE, (2015)In-memory Computation of Error-Correcting Codes Using a Reconfigurable HfOx ReRAM 1T1R Array., , , , , and . MWSCAS, page 593-598. IEEE, (2021)Techniques for Improved Reliability in Memristive Crossbar PUF Circuits., , , , , , and . ISVLSI, page 212-217. IEEE Computer Society, (2016)Fabrication and Performance of Hybrid ReRAM-CMOS Circuit Elements for Dynamic Neural Networks., , , , , , , , and . ICONS, page 6:1-6:4. ACM, (2019)Flow-based computing on nanoscale crossbars: Design and implementation of full adders., , , , and . ISCAS, page 1870-1873. IEEE, (2016)Bilayer Ga-Sb Phase Change Memory with Intermediate Resistance State., , , , , , , , , and 1 other author(s). DRC, page 1-2. IEEE, (2021)A practical hafnium-oxide memristor model suitable for circuit design and simulation., , , , and . ISCAS, page 1-4. IEEE, (2017)