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Device-Circuit Optimization for Minimal Energy and Power Consumption in CMOS Random Logic Networks., , and . DAC, page 403-408. ACM Press, (1997)Manufacturability of Mixed Signal Systems., and . VLSI Design, page 608. IEEE Computer Society, (1999)Low Power Neural Network Accelerators Using Collaborative Weight Tuning and Shared Shift-Add optimization., , , and . MWSCAS, page 1-4. IEEE, (2022)Concurrent Error Detection in Linear Analog and Switched-Capacitor State Variable Systems Using Continuous Checksums.. ITC, page 582-591. IEEE Computer Society, (1991)Efficient cross-layer concurrent error detection in nonlinear control systems using mapped predictive check states., , and . ITC, page 1-10. IEEE, (2016)Mixed Signal Design Validation Using Reinforcement Learning Guided Stimulus Generation for Behavior Discovery., , and . VTS, page 1-6. IEEE, (2019)Rapid prototyping using high density interconnects., , , , and . EURO-DAC, page 439-443. IEEE Computer Society, (1990)Yield Recovery of RF Transceiver Systems Using Iterative Tuning-Driven Power-Conscious Performance Optimization., , , , and . IEEE Des. Test, 32 (1): 61-69 (2015)Characterization of Library Cells for Open-circuit Defect Exposure: A Systematic Methodology., , , , , and . ITC, page 1-10. IEEE, (2019)Environment-Adaptive Concurrent Companding and Bias Control for Efficient Power-Amplifier Operation., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (3): 607-618 (2011)