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NEST: DIMM based Near-Data-Processing Accelerator for K-mer Counting.

, , , , and . ICCAD, page 28:1-28:9. IEEE, (2020)

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CNNWire: Boosting Convolutional Neural Network with Winograd on ReRAM based Accelerators., , , , and . ACM Great Lakes Symposium on VLSI, page 283-286. ACM, (2019)NEST: DIMM based Near-Data-Processing Accelerator for K-mer Counting., , , , and . ICCAD, page 28:1-28:9. IEEE, (2020)AERIS: area/energy-efficient 1T2R ReRAM based processing-in-memory neural network system-on-a-chip., , , , , , , , and . ASP-DAC, page 146-151. ACM, (2019)Architecture exploration for ambient energy harvesting nonvolatile processors., , , , , , , , and . HPCA, page 526-537. IEEE Computer Society, (2015)Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network., , , , , , , , , and 4 other author(s). ISCA, page 946-961. ACM, (2022)Balancing Memory Accesses for Energy-Efficient Graph Analytics Accelerators., , , , , , , , , and 1 other author(s). ISLPED, page 1-6. IEEE, (2019)SCOPE: A Stochastic Computing Engine for DRAM-Based In-Situ Accelerator., , , , , , , , and . MICRO, page 696-709. IEEE Computer Society, (2018)Pinatubo: a processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories., , , , , and . DAC, page 173:1-173:6. ACM, (2016)Analysis and Optimization of the Memory Hierarchy for Graph Processing Workloads., , , , , , , and . HPCA, page 373-386. IEEE, (2019)Utilizing voltage-frequency islands in C-to-RTL synthesis for streaming applications., , , , and . DATE, page 992-995. EDA Consortium San Jose, CA, USA / ACM DL, (2013)