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Disambiguation of "Régnier, Arnaud"

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Effects of 1064 nm laser on MOS capacitor.

, , , , , , and . Microelectron. Reliab., 52 (9-10): 1816-1821 (2012)

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Rémi Régnier

Jean-Luc Régnier

Anton Regnier

Lise Regnier

Ferdinand Regnier

 

Other publications of authors with the same name

Effects of 1064 nm laser on MOS capacitor., , , , , , and . Microelectron. Reliab., 52 (9-10): 1816-1821 (2012)Effects of Lightly Doped Drain and Channel Doping Variations on Flash Memory Performances and Reliability., , , , , , and . J. Low Power Electron., 8 (5): 717-724 (2012)A Schmitt trigger to benchmark the performance of a new zero-cost transistor., , , , , , , , and . ICECS 2022, page 1-4. IEEE, (2022)Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology., , , , , , , , , and 2 other author(s). MWSCAS, page 897-900. IEEE, (2014)Hot Electron Source Side Injection Comprehension in 40nm eSTM™., , , , , , , , , and . IMW, page 1-4. IEEE, (2021)Simulation of state of the art EEPROM programming window closure during endurance degradation., , , , , and . DTIS, page 1-5. IEEE, (2021)Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology., , , , , , , , , and 1 other author(s). DTIS, page 1-5. IEEE, (2021)40nm SONOS Embedded Select in Trench Memory., , , , , , , , , and 3 other author(s). ESSDERC, page 21-24. IEEE, (2023)Leakage paths identification in NVM using biased data retention., , , , , and . Microelectron. Reliab., 50 (9-11): 1474-1478 (2010)Benchmarking and optimization of trench-based multi-gate transistors in a 40 nm non-volatile memory technology., , , , , and . DTIS, page 1-4. IEEE, (2021)