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Domain-Specific Modeling and Optimization for Graph Processing on FPGAs.

, , and . ARC, volume 12700 of Lecture Notes in Computer Science, page 315-326. Springer, (2021)

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Domain-Specific Modeling and Optimization for Graph Processing on FPGAs., , and . ARC, volume 12700 of Lecture Notes in Computer Science, page 315-326. Springer, (2021)High Performance Sparse LU Solver FPGA Accelerator Using a Static Synchronous Data Flow Model., , and . FCCM, page 29. IEEE Computer Society, (2015)Massive parallelization of SPICE device model evaluation on GPU-based SIMD architectures., and . IFMT, page 12. ACM, (2008)Parallel circuit simulation using the direct method on a heterogeneous cloud., , and . DAC, page 186:1-186:6. ACM, (2015)NOA'S-Arc: NISC based, optimized array scalable architecture., , and . MWSCAS, page 1346-1349. IEEE, (2013)CommAnalyzer: automated estimation of communication cost and scalability on HPC clusters from sequential code., , , and . HPDC, page 80-91. ACM, (2018)Design methodologies for high-performance noise-tolerant XOR-XNOR circuits., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 53-I (4): 867-878 (2006)Enhanced mobile node's reachability through anycasting for MIPv6 regional registrations., , and . AICCSA, page 341-348. IEEE Computer Society, (2008)Exploring FPGA-specific Optimizations for Irregular OpenCL Applications., , , , and . ReConFig, page 1-8. IEEE, (2018)AutoMatch: An automated framework for relative performance estimation and workload distribution on heterogeneous HPC systems., , , and . IISWC, page 32-42. IEEE Computer Society, (2017)