( en | de | ru )

 

Disambiguation of "Bruguera, Javier D."

Author of the publication

copydeleteadd this publication to your clipboard
A parallel markovian model reliability algorithm for hypercube networks.

, , , and . Microprocessing and Microprogramming, 27 (1-5): 501-508 (1989)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Javier Manero

Javier Jáurequi

Javier Dreyer

Javier Papa

Javier Arpón

 

Other publications of authors with the same name

New arithmetic coder/decoder architectures based on pipelining., and . ASAP, page 106-115. IEEE Computer Society, (1997)Multilevel Reverse-Carry Adder., and . ICCD, page 155-162. IEEE Computer Society, (2000)The STEM-II Air Quality Model on a Distributed Memory System., , , , , and . ICPP Workshops, page 85-92. IEEE Computer Society, (2001)A New Architecture for fast Arithmetic Coding in H.264 Advanced Video Coder., and . DSD, page 298-305. IEEE Computer Society, (2005)Analysis of the Impact of Different Methods for Division/Square Root Computation in the Performance of a Superscalar Microprocessor., , and . DSD, page 218-225. IEEE Computer Society, (2002)Gaussian elimination with pivoting on hypercubes., , , , and . Parallel Comput., 14 (1): 51-60 (1990)Radix-64 Floating-Point Division and Square Root: Iterative and Pipelined Units.. IEEE Trans. Computers, 72 (10): 2990-3001 (October 2023)Cordic based parallel/pipelined architecture for the Hough transform., , , , and . VLSI Signal Processing, 12 (3): 207-221 (1996)Floating-Point Multiply-Add-Fused with Reduced Latency., and . IEEE Trans. Computers, 53 (8): 988-1003 (2004)High-Throughput Architecture for H.264/AVC CABAC Compression System., and . IEEE Trans. Circuits Syst. Video Techn., 16 (11): 1376-1384 (2006)