Author of the publication

High-performance multiplierless transform architecture for HEVC.

, , and . ISCAS, page 1668-1671. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

VLSI architecture of digital matched filter and prime interleaver for W-CDMA., , , , and . ISCAS (3), page 269-272. IEEE, (2002)Recursive maximum likelihood decoder for high-speed satellite communication., , , , , , and . ISCAS (4), page 572-575. IEEE, (1999)High Performance Java Hardware Engine and Software Kernel for Embedded Systems., , , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 109-120. Kluwer, (2001)OptRod: operating multiple various actuators simultaneously by projected images., , , , and . SIGGRAPH ASIA Emerging Technologies, page 11:1-11:2. ACM, (2017)Ketsuro-Graffiti: An Interactive Display with Water Condensation., , and . ISS, page 49-55. ACM, (2016)Mixed-grained reconfigurable architecture supporting flexible reliability and C-based design., , , , , , , , and . ReConFig, page 1-6. IEEE, (2013)Stochastic timing error rate estimation under process and temporal variations., , , and . ITC, page 1-10. IEEE, (2015)Trade-off analysis between timing error rate and power dissipation for adaptive speed control with timing error prediction., , , and . ASP-DAC, page 266-271. IEEE, (2009)Jitter amplifier for oscillator-based true random number generator., , and . ASP-DAC, page 81-82. IEEE, (2011)An oscillator-based true random number generator with process and temperature tolerance., , and . ASP-DAC, page 4-5. IEEE, (2015)