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Combining Software and Hardware Verification Techniques.

, , , , и . Formal Methods Syst. Des., 21 (3): 251-280 (2002)

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Robert P Umbricht

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Analysis of digital circuits through symbolic reduction., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (11): 1356-1371 (1991)Model Checking and Abstraction.. SARA, том 2371 из Lecture Notes in Computer Science, стр. 1-17. Springer, (2002)Model Checking Synchronous Timing Diagrams., , , и . FMCAD, том 1954 из Lecture Notes in Computer Science, стр. 283-298. Springer, (2000)A Unified Approach For Showing Language Containment And Equivalence Between Various Types Of Omega-Automata., , и . CAAP, том 431 из Lecture Notes in Computer Science, стр. 103-116. Springer, (1990)Rtdt: A Front-End for Efficient Model Checking of Synchronous Timing Diagrams., , , и . CAV, том 2102 из Lecture Notes in Computer Science, стр. 387-390. Springer, (2001)An Analysis of SAT-Based Model Checking Techniques in an Industrial Environment., , , , и . CHARME, том 3725 из Lecture Notes in Computer Science, стр. 254-268. Springer, (2005)Automated Implementation from Formal Specification., и . PSTV, стр. 127-136. North-Holland, (1984)The Evolution of Commercial Formal Verification.. PDPTA, CSREA Press, (2000)A Unified Approch for Showing Language Inclusion and Equivalence Between Various Types of omega-Automata., , и . Inf. Process. Lett., 46 (6): 301-308 (1993)Translating Software Designs for Model Checking., , , и . FASE, том 2984 из Lecture Notes in Computer Science, стр. 324-338. Springer, (2004)