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Disambiguation of "Deshmukh, Raghavendra B."

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Data dependent spurious power reduction for fixed width multiplier.

, , and . VDAT, page 1-2. IEEE, (2016)

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Sachin Deshmukh

Ravindra Deshmukh

J-Raghavendra Rao

Manjeet Vinayakrao Deshmukh

Mandar Vinayakrao Deshmukh

 

Other publications of authors with the same name

Design of Low Power Parallel Multiplier., , , and . J. Low Power Electron., 5 (1): 31-39 (2009)Side channel attack resistant architecture for elliptic curve cryptography., and . VDAT, page 1-2. IEEE Computer Society, (2015)Powering Wireless Sensor Nodes using Ambient RF Energy., , , and . SMC, page 2695-2700. IEEE, (2006)Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region., , and . VDAT, volume 892 of Communications in Computer and Information Science, page 109-120. Springer, (2018)Self-compensation scheme for truncation error in fixed width multipliers., , and . IET Circuits Devices Syst., 12 (1): 55-62 (2018)Computational Functions' VLSI Implementation for Compressed Sensing., , , and . VDAT, volume 382 of Communications in Computer and Information Science, page 35-43. Springer, (2013)Novel fault attack resistant architecture for elliptic curve cryptography., and . Microprocess. Microsystems, (2021)Design and Fabrication of Versatile Low Power Wireless Sensor Nodes for IoT Applications., , and . VDAT, volume 892 of Communications in Computer and Information Science, page 705-719. Springer, (2018)Fast Architecture of Modular Inversion Using Itoh-Tsujii Algorithm., , and . VDAT, volume 711 of Communications in Computer and Information Science, page 48-55. Springer, (2017)Optimization of elliptic curve scalar multiplication using constraint based scheduling., and . J. Parallel Distributed Comput., (2022)