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High-speed Binary Signed-Digit RNS adder with posibit and negabit encoding., , , and . VLSI-SoC, page 58-59. IEEE, (2013)Scaling HMMER Performance on Multicore Architectures., , , , and . CISIS, page 618-623. IEEE Computer Society, (2011)Visual Data Rectangular Memory., , and . Euro-Par, volume 3149 of Lecture Notes in Computer Science, page 760-767. Springer, (2004)Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications., , , , and . SAMOS, volume 5114 of Lecture Notes in Computer Science, page 53-64. Springer, (2008)Scalability Evaluation of a Polymorphic Register File: A CG Case Study., , , , and . ARCS, volume 6566 of Lecture Notes in Computer Science, page 13-25. Springer, (2011)Online evolving fuzzy rule-based prediction model for high frequency trading financial data stream., , , , and . EAIS, page 169-175. IEEE, (2016)On implementability of Polymorphic Register Files., , and . ReCoSoC, page 1-6. IEEE, (2012)Exploiting SPMD Horizontal Locality., and . IEEE Comput. Archit. Lett., 10 (1): 20-23 (2011)Low Area Overhead Custom Buffering for FFT., , , , , and . ReConFig, page 1-8. IEEE, (2019)March LA: a test for linked memory faults., , , and . ED&TC, page 627. IEEE Computer Society, (1997)