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Adaptive Porting of Analog IPs with Reusable Conservative Properties.

, , , , , and . ISVLSI, page 18-23. IEEE Computer Society, (2006)

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Module Placement on BSG-Structure with Pre-Placed Modules and Rectilinear Modules., , and . ASP-DAC, page 571-576. IEEE, (1998)The Oct-Touched Tile: A New Architecture for Shape-Based Routing., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (2): 448-455 (2006)A matroid generalization of theorems of Lewin and Gallai., and . Discret. Appl. Math., 9 (2): 213-216 (1984)Order of Channels for Safe Routing and Optimal Compaction of Routing Area.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2 (4): 293-300 (1983)Adaptive Porting of Analog IPs with Reusable Conservative Properties., , , , , and . ISVLSI, page 18-23. IEEE Computer Society, (2006)New Approximation Results on Graph Matching and related Problems., , and . WG, volume 903 of Lecture Notes in Computer Science, page 343-358. Springer, (1994)Equidistance routing in high-speed VLSI layout design., , , and . ACM Great Lakes Symposium on VLSI, page 220-223. ACM, (2004)The minimum width routing of A 2-row 2-layer polycell-layout., and . DAC, page 290-296. ACM, (1979)Coding the objects in place and route CAD.. ISPD, page 62-65. ACM, (2013)Consistent floorplanning with hierarchical superconstraints., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (1): 42-49 (2002)