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Acceleration of Composite Order Bilinear Pairing on Graphics Hardware.

, , , , and . ICICS, volume 7618 of Lecture Notes in Computer Science, page 341-348. Springer, (2012)

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Software enabled wear-leveling for hybrid PCM main memory on embedded systems., , , , and . DATE, page 599-602. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Computation and data transfer co-scheduling for interconnection bus minimization., , , and . ASP-DAC, page 311-316. IEEE, (2009)WUCC: Joint WCET and Update Conscious Compilation for cyber-physical systems., , and . ASP-DAC, page 65-70. IEEE, (2013)Accurate personal ultraviolet dose estimation with multiple wearable sensors., , , , , , and . BSN, page 347-352. IEEE, (2016)Sleep-aware mode assignment in wireless embedded systems., , and . J. Parallel Distributed Comput., 71 (7): 1002-1010 (2011)Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory., , , and . ISLPED, page 75-80. ACM, (2014)Boosting the Performance of SSDs via Fully Exploiting the Plane Level Parallelism., , , , , and . IEEE Trans. Parallel Distributed Syst., 31 (9): 2185-2200 (2020)I/O scheduling with mapping cache awareness for flash based storage systems., , , , and . EMSOFT, page 21:1-21:10. ACM, (2016)Iterational retiming with partitioning: Loop scheduling with complete memory latency hiding., , , and . ACM Trans. Embed. Comput. Syst., 9 (3): 22:1-22:26 (2010)Balanced loop retiming to effectively architect STT-RAM-based hybrid cache for VLIW processors., , , , , , and . SAC, page 1710-1716. ACM, (2016)