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Disambiguation of "Fan, Deliang"

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Exploring a SOT-MRAM Based In-Memory Computing for Data Processing.

, , , , and . IEEE Trans. Multi Scale Comput. Syst., 4 (4): 676-685 (2018)

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Deliang Wang

Deliang Chen

Fan Dai

Min Fan

Hua Fan

 

Other publications of authors with the same name

Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing., , , and . IEEE Trans. Neural Networks Learn. Syst., 27 (9): 1907-1919 (2016)Artificial Neuron using Ag/2D-MoS2/Au Threshold Switching Memristor., , , , , , , , , and . DRC, page 193-194. IEEE, (2019)Voltage-Based Concatenatable Full Adder Using Spin Hall Effect Switching., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (12): 2134-2138 (2017)IMCE: Energy-efficient bit-wise in-memory convolution engine for deep neural network., , , and . ASP-DAC, page 111-116. IEEE, (2018)Exploring STT-MRAM Based In-Memory Computing Paradigm with Application of Image Edge Extraction., , and . ICCD, page 439-446. IEEE Computer Society, (2017)AlignS: A Processing-In-Memory Accelerator for DNA Short Read Alignment Leveraging SOT-MRAM., , , and . DAC, page 144. ACM, (2019)Defending Bit-Flip Attack through DNN Weight Reconstruction., , , , , , and . DAC, page 1-6. IEEE, (2020)Hybrid polymorphic logic gate using 6 terminal magnetic domain wall motion device., , , and . ISCAS, page 1-4. IEEE, (2017)Deep-Dup: An Adversarial Weight Duplication Attack Framework to Crush Deep Neural Network in Multi-Tenant FPGA., , , and . USENIX Security Symposium, page 1919-1936. USENIX Association, (2021)Gradient-Based Novelty Detection Boosted by Self-Supervised Binary Classification., , , , , , and . AAAI, page 8370-8377. AAAI Press, (2022)