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Compact Buffered Routing Architecture.

, , , , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 179-188. Springer, (2004)

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Design and implementation of a reconfigurable heterogeneous multiprocessor SoC., , , , , , , and . CICC, page 93-96. IEEE, (2006)A VLIW processor with reconfigurable instruction set for embedded applications., , , , , and . IEEE J. Solid State Circuits, 38 (11): 1876-1886 (2003)Routing architecture for multi-context FPGAs., , , , , and . FPGA, page 246. ACM, (2004)Interactive presentation: Implementation of AES/Rijndael on a dynamically reconfigurable architecture., , , and . DATE, page 355-360. EDA Consortium, San Jose, CA, USA, (2007)An Embedded Reconfigurable Datapath for SoC., , , , , and . FCCM, page 303-304. IEEE Computer Society, (2005)A case-study on multimedia applications for the XiRisc reconfigurable processor., , , and . ISCAS, IEEE, (2006)Very low complexity prompted speaker verification system based on HMM-modeling., , and . ICASSP, page 3912-3915. IEEE, (2002)A Dataflow Control Unit for C-to-Configurable Pipelines Compilation Flow., , , , and . FCCM, page 332-333. IEEE Computer Society, (2004)A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems., , , , , , , , and . IPDPS, page 171. IEEE Computer Society, (2003)Decoder-Based Multi-Context Interconnect Architecture., , , , and . ISVLSI, page 231-233. IEEE Computer Society, (2003)