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Efficient System Architecture in the Era of Monolithic 3D: Dynamic Inter-tier Interconnect and Processing-in-Memory.

D. Stow, I. Akgun, W. Huangfu, Y. Xie, X. Li, and G. Loh. DAC, page 100. ACM, (2019)

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Dilek Akgün

Itir Gruber

Ali Akgün

Hakan Akgün

Toygar Akgun

Other publications of authors with the same name

Investigation of Cost-Optimal Network-on-Chip for Passive and Active Interposer Systems.D. Stow, I. Akgun, and Y. Xie. SLIP, page 1-8. IEEE, (2019)Efficient System Architecture in the Era of Monolithic 3D: Dynamic Inter-tier Interconnect and Processing-in-Memory.D. Stow, I. Akgun, W. Huangfu, Y. Xie, X. Li, and G. Loh. DAC, page 100. ACM, (2019)Cost and Thermal Analysis of High-Performance 2.5D and 3D Integrated Circuit Design Space.D. Stow, I. Akgun, R. Barnes, P. Gu, and Y. Xie. ISVLSI, page 637-642. IEEE Computer Society, (2016)There and Back Again: Optimizing the Interconnect in Networks of Memory Cubes.M. Poremba, I. Akgun, J. Yin, O. Kayiran, Y. Xie, and G. Loh. ISCA, page 678-690. ACM, (2017)Near-Data Acceleration of Privacy-Preserving Biomarker Search with 3D-Stacked Memory.A. Glova, I. Akgun, S. Li, X. Hu, and Y. Xie. DATE, page 800-805. IEEE, (2019)Cost analysis and cost-driven IP reuse methodology for SoC design based on 2.5D/3D integration.D. Stow, I. Akgun, R. Barnes, P. Gu, and Y. Xie. ICCAD, page 56. ACM, (2016)Alleviating Irregularity in Graph Analytics Acceleration: a Hardware/Software Co-Design Approach.M. Yan, X. Hu, S. Li, A. Basak, H. Li, X. Ma, I. Akgun, Y. Feng, P. Gu, L. Deng and 4 other author(s). MICRO, page 615-628. ACM, (2019)Scalable memory fabric for silicon interposer-based multi-core systems.I. Akgun, J. Zhan, Y. Wang, and Y. Xie. ICCD, page 33-40. IEEE Computer Society, (2016)Network-on-Chip Design Guidelines for Monolithic 3-D Integration.I. Akgun, D. Stow, and Y. Xie. IEEE Micro, 39 (6): 46-53 (2019)Balancing Memory Accesses for Energy-Efficient Graph Analytics Accelerators.M. Yan, X. Hu, S. Li, I. Akgun, H. Li, X. Ma, L. Deng, X. Ye, Z. Zhang, D. Fan and 1 other author(s). ISLPED, page 1-6. IEEE, (2019)

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Disambiguation of "Akgun, Itir"

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Efficient System Architecture in the Era of Monolithic 3D: Dynamic Inter-tier Interconnect and Processing-in-Memory.

Please choose a person to relate this publication to

Dilek Akgün

Itir Gruber

Ali Akgün

Hakan Akgün

Toygar Akgun

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Akgun, Itir"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Efficient System Architecture in the Era of Monolithic 3D: Dynamic Inter-tier Interconnect and Processing-in-Memory.

Please choose a person to relate this publication to

Dilek Akgün

Itir Gruber

Ali Akgün

Hakan Akgün

Toygar Akgun

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Efficient System Architecture in the Era of Monolithic 3D: Dynamic Inter-tier Interconnect and Processing-in-Memory.