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Cache-aware partitioning of multi-dimensional iteration spaces., , , , и . SYSTOR, стр. 15. ACM, (2009)Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® CoreTM 2 Duo processor., , , , , , и . ICSAMOS, стр. 132-141. IEEE, (2008)Abstract Description of Pointer Data Structures: An Approach for Improving the Analysis and Optimization of Imperative Programs., , и . LOPLAS, 1 (3): 243-260 (1992)Adapting cache line size to application behavior., , , , и . International Conference on Supercomputing, стр. 145-154. ACM, (1999)Author retrospective for a global resource-constrained parallelization technique., и . ICS 25th Anniversary, стр. 7-8. ACM, (2014)Using Hardware Counters to Predict Vectorization., , , , , и . LCPC, том 11403 из Lecture Notes in Computer Science, стр. 3-16. Springer, (2017)Memory aware compilation through accurate timing extraction., , и . DAC, стр. 316-321. ACM, (2000)New directions in compiler technology for embedded systems (embedded tutorial)., , , и . ASP-DAC, стр. 409-414. ACM, (2001)Parallel processing: a smart compiler and a dumb machine., , , и . SIGPLAN Symposium on Compiler Construction, стр. 37-47. ACM, (1984)Efficient utilization of scratch-pad memory in embedded processor applications., , и . ED&TC, стр. 7-11. IEEE Computer Society, (1997)