( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
FREE-p: Protecting non-volatile memory against both hard and soft errors.

, , , , , и . HPCA, стр. 466-477. IEEE Computer Society, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Naveen

Naveen Kumar

Naveen Sivadasan

Naveen Nagarajan

Naveen Verma

 

Другие публикации лиц с тем же именем

Design trade-offs for high density cross-point resistive memory., , , , и . ISLPED, стр. 209-214. ACM, (2012)CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory., , , , , и . DATE, стр. 33-38. IEEE, (2012)Staged Reads: Mitigating the impact of DRAM writes on DRAM reads., , , , и . HPCA, стр. 41-52. IEEE Computer Society, (2012)Understanding the trade-offs in multi-level cell ReRAM memory design., , , , и . DAC, стр. 108:1-108:6. ACM, (2013)Rethinking DRAM design and organization for energy-constrained multi-cores., , , , , и . ISCA, стр. 175-186. ACM, (2010)Interconnect design considerations for large NUCA caches., и . ISCA, стр. 369-380. ACM, (2007)Improving memristor memory with sneak current sharing., , , и . ICCD, стр. 549-556. IEEE Computer Society, (2015)LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems., , , , и . ISCA, стр. 285-296. IEEE Computer Society, (2012)The role of optics in future high radix switch design., , , , , , и . ISCA, стр. 437-448. ACM, (2011)Overcoming the challenges of crossbar resistive memory architectures., , , , , , и . HPCA, стр. 476-488. IEEE Computer Society, (2015)