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AN EFFICIENT BASE-4 LEADING ZERO DETECTOR DESIGN

, and . Electrical Engineering: An International Journal (EEIJ), 5 (1): 7 (March 2018)

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Fault Diagnosis in Analog Circuits Using Element Modulation., , and . IEEE Des. Test Comput., 9 (1): 19-29 (1992)A Unified Scheme for Designing Testable State Machines., and . Asian Test Symposium, page 273-278. IEEE Computer Society, (2001)A Step Response Based Mixed-Signal BIST Approach .. DFT, page 329-337. IEEE Computer Society, (2001)Research-to-Practice for Peer-to-Peer Learning in Engineering Education using Ensemble Methods to Deploy a Lifecycle Design Roadmap., , , , , , , , , and 6 other author(s). FIE, page 1-9. IEEE, (2022)On-Line Error Detectable Carry-Free Adder Design., and . DFT, page 66-71. IEEE Computer Society, (2001)Integrating Support Vector Machine Models into the Engineering Lifecycle Design Roadmap Process for Innovative Practices using Project Based Learning., , , , , , , , , and 6 other author(s). FIE, page 1-9. IEEE, (2022)A Transition Based BIST Approach for Passive Analog Circuits., and . ISQED, page 347-354. IEEE Computer Society, (2000)An approach for detecting bridging faults in CMOS domino logic circuits using dynamic power supply current monitoring., , and . DFT, page 272-280. IEEE Computer Society, (1997)AN EFFICIENT BASE-4 LEADING ZERO DETECTOR DESIGN, and . Electrical Engineering: An International Journal (EEIJ), 5 (1): 7 (March 2018)On Self-Checking Design of CMOS Circuits for Multiple Faults., , and . VLSI Design, 7 (2): 151-161 (1998)