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Disambiguation of "De, Vivek"

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Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS.

, , , , and . ISLPED, page 19-23. ACM, (2002)

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Nagarajavel Vivekananthan

Vivek Venkataramani

Vivek Ramamurthy

Vivek Bose

Vivek Shetty

 

Other publications of authors with the same name

Resiliency for many-core system on a chip., , , , , , and . ASP-DAC, page 388-389. IEEE, (2014)A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation., , , , , , , and . ISSCC, page 234-236. IEEE, (2019)Conductance modulation techniques in switched-capacitor DC-DC converter for maximum-efficiency tracking and ripple mitigation in 22nm Tri-gate CMOS., , , , , and . CICC, page 1-4. IEEE, (2014)A 2.3nJ/frame Voice Activity Detector based audio front-end for context-aware System-on-Chip applications in 32nm CMOS., , , , , and . CICC, page 1-4. IEEE, (2012)A Sub-cm3 Energy-Harvesting Stacked Wireless Sensor Node Featuring a Near-Threshold Voltage IA-32 Microcontroller in 14-nm Tri-Gate CMOS for Always-ON Always-Sensing Applications., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 52 (4): 961-971 (2017)5-GHz 32-bit integer execution core in 130-nm dual-VT CMOS., , , , , , , , , and 12 other author(s). IEEE J. Solid State Circuits, 37 (11): 1421-1432 (2002)Introduction to the Special Issue on the 2011 Symposium on VLSI Circuits., and . IEEE J. Solid State Circuits, 47 (4): 795-796 (2012)Postsilicon Voltage Guard-Band Reduction in a 22 nm Graphics Execution Core Using Adaptive Voltage Scaling and Dynamic Power Gating., , , , , , , , and . IEEE J. Solid State Circuits, 52 (1): 50-63 (2017)Life is CMOS: why chase the life after?, , and . DAC, page 78-83. ACM, (2002)Design and reliability challenges in nanometer technologies., , and . DAC, page 75. ACM, (2004)