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Disambiguation of "Lloris-Ruíz, Antonio"

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Intellectual Property Protection of HDL IP Cores Through Automated Sognature Hosting.

, , , , and . FPL, page 183-188. IEEE, (2007)

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Sergio Antonio Ruiz

Antonio Candel Ruiz

Antonio Ruiz-Torres

José Francisco Ruíz Borge

Miguel Angel Ruíz Martínez

 

Other publications of authors with the same name

Implementation of the one dimensional discrete cosine transform using the residue number system., , , , and . ICECS, page 433-436. IEEE, (2001)Design of RNS-based distributed arithmetic DWT filterbanks., , , , , and . ICASSP, page 1193-1196. IEEE, (2001)Testability of AND-EXOR logic vs. AND-OR logic., , and . ICECS, page 213-216. IEEE, (1998)Modified Boltzmann Machine for an Efficient Distributed Implementation., , , , and . IWANN, volume 1240 of Lecture Notes in Computer Science, page 1221-1232. Springer, (1997)IPP Watermarking Technique for IP Core Protection on FPL Devices., , , , and . FPL, page 1-6. IEEE, (2006)Intellectual Property Protection for RNS Circuits on FPGAs., , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 1139-1141. Springer, (2004)A Look-Up Scheme for Scaling in the RNS., and . IEEE Trans. Computers, 48 (7): 748-751 (1999)Analysis of RNS-FPL Synergy for High Throughput DSP Applications: Discrete Wavelet Transform., , , , and . FPL, volume 1896 of Lecture Notes in Computer Science, page 342-351. Springer, (2000)RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic., , , and . ISCAS (1), page 486-489. IEEE, (1999)Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies., , , , and . J. VLSI Signal Process., 34 (3): 227-237 (2003)