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Ein 32-Bit-Rechenwerk mit eingebautem Hardware-Selbsttest.

, , , and . Fehlertolerierende Rechensysteme, volume 54 of Informatik-Fachberichte, page 45-58. Springer, (1982)

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A Test Generator IC for Testing Large CMOS-RAMs., and . ITC, page 18-24. IEEE Computer Society, (1986)Iterative algorithms for computing aliasing probabilities., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (2): 260-265 (1991)Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials., , , and . ITC, page 282-289. IEEE Computer Society, (1986)Hardware Test Pattern Generation for Built-In Testing., and . ITC, page 110-120. IEEE Computer Society, (1981)A Hardware Approach to Self-Testing of Large Programmable Logic Arrays., and . IEEE Trans. Computers, 30 (11): 829-833 (1981)A unified treatment of PLA faults by Boolean differences.. DAC, page 334-338. IEEE Computer Society Press, (1986)Electrosmog and Electromagnetic CAD (Invited Paper).. HPCN, volume 796 of Lecture Notes in Computer Science, page 94-98. Springer, (1994)Bounds and analysis of aliasing errors in linear feedback shift registers., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (1): 75-83 (1988)Self-Test in a Standard Cell Environment., , and . IEEE Des. Test, 3 (6): 35-41 (1986)