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A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory.

Y. Xiao, Y. Xu, S. Deng, Z. Zhao, S. George, K. Ni, and V. Narayanan. ISVLSI, page 1-6. IEEE, (2023)

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P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

Other publications of authors with the same name

Modeling steep slope devices: From circuits to architectures.K. Swaminathan, M. Kim, N. Chandramoorthy, B. Sedighi, R. Perricone, J. Sampson, and V. Narayanan. DATE, page 1-6. European Design and Automation Association, (2014)Programmable Non-Volatile Memory Design Featuring Reconfigurable In-Memory Operations.N. Jao, A. Ramanathan, A. Sengupta, J. Sampson, and V. Narayanan. ISCAS, page 1-5. IEEE, (2019)AutoFLEX: A Framework for Image Processing Applications on Multiple-FPGA Systems.V. Narayanan, A. Al-Maashri, K. Irick, M. DeBole, and S. Park. ERSA, page 59-66. CSREA Press, (2010)Design space exploration of workload-specific last-level caches.K. Swaminathan, E. Kultursay, V. Saripalli, V. Narayanan, and M. Kandemir. ISLPED, page 243-248. ACM, (2012)Design and analysis of an NoC architecture from performance, reliability and energy perspective.J. Kim, D. Park, C. Nicopoulos, N. Vijaykrishnan, and C. Das. ANCS, page 173-182. ACM, (2005)A low latency router supporting adaptivity for on-chip interconnects.J. Kim, D. Park, T. Theocharides, N. Vijaykrishnan, and C. Das. DAC, page 559-564. ACM, (2005)A Dual-VDD Low Power FPGA Architecture.A. Gayasen, K. Lee, N. Vijaykrishnan, M. Kandemir, M. Irwin, and T. Tuan. FPL, volume 3203 of Lecture Notes in Computer Science, page 145-157. Springer, (2004)Robust Coreset Construction for Distributed Machine Learning.H. Lu, M. Li, T. He, S. Wang, V. Narayanan, and K. Chan. IEEE J. Sel. Areas Commun., 38 (10): 2400-2417 (2020)Experimental Evaluation of Energy Behavior of Iteration Space Tiling.M. Kandemir, N. Vijaykrishnan, M. Irwin, and H. Kim. LCPC, volume 2017 of Lecture Notes in Computer Science, page 142-157. Springer, (2000)A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications.U. Heo, X. Li, H. Liu, S. Gupta, S. Datta, and V. Narayanan. VLSID, page 304-309. IEEE Computer Society, (2015)

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Disambiguation of "Narayanan, Vijaykrishnan"

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A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory.

Please choose a person to relate this publication to

P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Narayanan, Vijaykrishnan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory.

Please choose a person to relate this publication to

P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory.