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Modeling of Apparent Activation Energy and Lifetime Estimation for Retention of 3D SGVC Memory.

, , , , , , and . IRPS, page 1-5. IEEE, (2019)

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Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memory., , , , , , , , , and 1 other author(s). IRPS, page 6-1. IEEE, (2018)Investigation of data pattern effects on nitride charge lateral migration in a charge trap flash memory by using a random telegraph signal method., , , , , , , and . IRPS, page 6. IEEE, (2018)First Study of P-Channel Vertical Split-Gate Flash Memory Device with Various Electron and Hole Injection Methods and Potential Future Possibility to Enable Functional Memory Circuits., , , , , and . IMW, page 1-4. IEEE, (2021)Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth (300Gb/s) 3D NAND Based In-Memory Search Accelerator for Ternary Content Addressable Memory (TCAM) and Proximity Search of Hamming Distance., , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)Study of the Walk-Out Effect of Junction Breakdown Instability of the High-Voltage Depletion-Mode N-Channel MOSFET for NAND Flash Peripheral Device and an Efficient Layout Solution., , , , , , , , and . IRPS, page 1-6. IEEE, (2020)Bit-Cost-Scalable 3D DRAM Architecture and Unit Cell First Demonstrated with Integrated Gate-Around and Channel-Around IGZO FETs., , , , , , , , , and 6 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2024)Write-In-Place Operation and It's Advantages to Upgrade the 3D AND-type Flash Memory Performances., , , , , and . IMW, page 1-4. IEEE, (2021)A 4b/cell NROM 1Gb Data-Storage Memory., , , , , , , , , and 9 other author(s). ISSCC, page 448-458. IEEE, (2006)Charge Loss Improvement in 3D Flash Memory by Molecular Oxidation of Tunneling Oxide., , , , , , , , and . IRPS, page 24. IEEE, (2024)3D-NAND based Filtering Cube with High Resolution 2D Query and Tunable Feature Length for Computational SSD., , , , , , , , , and . IMW, page 1-4. IEEE, (2024)