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Disambiguation of "Tanabe, Noboru"

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Network Interface Architecture for Scalable Message Queue Processing.

, , , and . ICPADS, page 268-275. IEEE Computer Society, (2009)

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Noboru Yamazaki

Noboru Sonoyama

Noboru Hasegawa

Sergio Noboru Kuriyama

 

Other publications of authors with the same name

Implementation and Evaluation of Multicast Mechanism on Network Interface Plugged into a Memory Slot., , , , , and . PDPTA, page 787-793. CSREA Press, (2007)A Packet Forwarding Layer for DIMMnet and its Hardware Implementation., , , , , and . PDPTA, page 461-467. CSREA Press, (2005)Base-m n-cube: High Performance Interconnection Networks for Highly Parallel Computer PRODIGY., , , , and . ICPP (1), page 509-516. CRC Press, (1991)Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot., , , , , , and . PARELEC, page 9-14. IEEE Computer Society, (2002)Acceleration for MPI derived datatypes using an enhancer of memory and network., and . IPDPS Workshops, page 1-6. IEEE, (2010)Evaluation of Network Interface Controller on DIMMnet-2 Prototype Board., , , , , , , , , and . PDCAT, page 778-780. IEEE Computer Society, (2005)An Enhancer of Memory and Network for Cluster and its Applications., and . PDCAT, page 99-106. IEEE Computer Society, (2008)On-the-fly Sending: A Low Latency High Bandwidth Message Transfer Mechanism., , , , , , and . ISPAN, page 186-194. IEEE Computer Society, (2000)The architecture of visualization system using memory with memory-side gathering and CPUs with DMA-type memory accessing., , , , and . PDPTA, page 427-433. CSREA Press, (2009)Introduction to Acceleration for MPI Derived Datatypes Using an Enhancer of Memory and Network., and . PVM/MPI, volume 5205 of Lecture Notes in Computer Science, page 324-325. Springer, (2008)