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Development and Testing on the European Space-Grade BRAVE FPGAs: Evaluation of NG-Large Using High-Performance DSP Benchmarks., , , , , , , and . IEEE Access, (2021)MAx-DNN: Multi-Level Arithmetic Approximation for Energy-Efficient DNN Hardware Accelerators., , , , and . LASCAS, page 1-4. IEEE, (2022)From Circuits to SoC Processors: Arithmetic Approximation Techniques & Embedded Computing Methodologies for DSP Acceleration.. CoRR, (2023)Efficient support vector machines implementation on Intel/Movidius Myriad 2., , , , , and . MOCAST, page 1-4. IEEE, (2018)Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications., , , , and . VLSI-SoC, page 1-4. IEEE, (2022)ApproxQAM: High-Order QAM Demodulation Circuits with Approximate Arithmetic., , , , and . MOCAST, page 1-5. IEEE, (2021)Systematic Embedded Development and Implementation Techniques on Intel Myriad VPUs., , and . VLSI-SoC, page 1-2. IEEE, (2022)Combining Arithmetic Approximation Techniques for Improved CNN Circuit Design., , , , and . ICECS, page 1-4. IEEE, (2020)FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks., , , , , , , , , and . ICECS, page 1-5. IEEE, (2021)ParalOS: A Scheduling & Memory Management Framework for Heterogeneous VPUs., , , and . DSD, page 221-228. IEEE, (2021)