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A performance model and code overlay generator for scratchpad enhanced embedded processors., , , , и . CODES+ISSS, стр. 287-296. ACM, (2010)Scheduling of synchronous data flow models onto scratchpad memory-based embedded processors., и . ACM Trans. Embed. Comput. Syst., 13 (1s): 30:1-30:25 (2013)ISIS: A Genetic Algorithm Based Technique for Custom On-Chip Interconnection Network Synthesis., и . VLSI Design, стр. 623-628. IEEE Computer Society, (2005)A Technique for Energy versus Quality of Service Trade-Off for MPEG-2 Decoder., , и . ISVLSI, стр. 313-316. IEEE Computer Society, (2004)Throughput optimal task allocation under thermal constraints for multi-core processors., , , и . DAC, стр. 776-781. ACM, (2009)A technique for low energy mapping and routing in network-on-chip architectures., и . ISLPED, стр. 387-392. ACM, (2005)Design of an Automatic Target Recognition algorithm on the IBM Cell Broadband Engine., и . ASAP, стр. 21-28. IEEE Computer Society, (2010)A Methodology for Layout Aware Design and Optimization of Custom Network-on-Chip Architectures., и . ISQED, стр. 352-357. IEEE Computer Society, (2006)Dynamic scheduling of stream programs on embedded multi-core processors., , и . CODES+ISSS, стр. 93-102. ACM, (2012)Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming., и . DAC, стр. 122-127. ACM, (2011)