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Disambiguation of "Azadet, Kamran"

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Low-power equalizer architectures for high-speed modems.

, and . IEEE Commun. Mag., 36 (10): 118-126 (1998)

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Kamran Maher

Kamran Saremi

Kamran Mobini

Kamran Ghoreschi

Kamran Moeinipour

 

Other publications of authors with the same name

Mixed-Mode Continuous-Time Video Acquisition Filters., , , and . ISCAS, page 775-778. IEEE, (1994)Low-power equalizer architectures for high-speed modems., and . IEEE Commun. Mag., 36 (10): 118-126 (1998)10.7 A 64GS/s 4×-Interpolated 1b Semi-Digital FIR DAC for Wideband Calibration and BIST of RF-Sampling A/D Converters., , , , , , , , , and 1 other author(s). ISSCC, page 176-178. IEEE, (2021)A low complexity joint equalizer and decoder for 1000Base-T Gigabit Ethernet., and . CICC, page 465-468. IEEE, (2000)The Design of CMOS Transconductor for High Frequency Continuous-Time Filter Applications., , , and . ISCAS, page 513-516. IEEE, (1994)Nonlinearity Modeling of a Chireix Outphasing Power Amplifier., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (12): 2898-2907 (2015)Reconfigurable hardware for efficient implementation of programmable FIR filters., , , and . ICASSP, page 3005-3008. IEEE, (1998)10.6 A 12b 16GS/s RF-Sampling Capacitive DAC for Multi-Band Soft-Radio Base-Station Applications with On-Chip Transmission-Line Matching Network in 16nm FinFET., , , , , , , and . ISSCC, page 174-176. IEEE, (2021)A 12-b 16-GS/s RF-Sampling Capacitive DAC for Multi-Band Soft Radio Base-Station Applications With On-Chip Transmission-Line Matching Network in 16-nm FinFET., , , , , , , , and . IEEE J. Solid State Circuits, 56 (12): 3655-3667 (2021)The use of reduced two's-complement representation in low-power DSP design., , , and . ISCAS (1), page 77-80. IEEE, (2002)