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Efficient Multiplexer Networks for Field-Data Extractors and Their Evaluations., , , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (4): 1015-1028 (2017)Code Generation Limiting Maximum and Minimum Hamming Distances for Non-Volatile Memories., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (12): 2484-2493 (2015)A Low Power Soft Error Hardened Latch with Schmitt-Trigger-Based C-Element., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (7): 1025-1034 (2018)A Zero-Gating Processing Element Design for Low-Power Deep Convolutional Neural Networks., , , и . APCCAS, стр. 317-320. IEEE, (2019)Trojan-Net Classification for Gate-Level Hardware Design Utilizing Boundary Net Structures., , и . IEICE Trans. Inf. Syst., 103-D (7): 1618-1622 (2020)Unified Dual-Radix Architecture for Scalable Montgomery Multiplications in GF(P) and GF(2n)., , , , , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 92-A (9): 2304-2317 (2009)A Hardware/Software Partitioning Algorithm for Processor Cores with Packed SIMD-Type Instructions., , , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 86-A (12): 3218-3224 (2003)Hardware Trojan detection and classification based on steady state learning., , и . IOLTS, стр. 215-220. IEEE, (2017)Clock skew estimate modeling for FPGA high-level synthesis and its application., , , и . ASICON, стр. 1-4. IEEE, (2015)A hardware-Trojan classification method utilizing boundary net structures., , и . ICCE, стр. 1-4. IEEE, (2018)