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The Architecture of an FPGA-Style Programmable Fuzzy Logic Controller Chip.

, , and . ACAC, page 51-56. IEEE Computer Society, (2000)

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Compact implementation of linear weighted CMOS transconductance adder based on the flipped voltage follower., , , , and . ISCAS, IEEE, (2006)Development of a cascade topology on IEEE 802.15.4 for a vertical transportation system., , , and . IECON, page 6002-6006. IEEE, (2012)Accurate micropower class AB CMOS voltage-to-current converter., , , and . ECCTD, page 114-117. IEEE, (2011)An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators., , , , , and . VLSI Design, page 294-299. IEEE Computer Society, (2008)Techniques for very low-voltage operation of continuous-time analog CMOS circuits., , and . VLSI Design, page 39-. IEEE Computer Society, (2004)CMOS operational amplifiers with continuous-time capacitive common mode feedback., , , and . ISCAS, page 1280-1283. IEEE, (2010)A new class AB differential input stage for implementation of low-voltage high slew rate op amps and linear transconductors., , , and . ISCAS (1), page 671-674. IEEE, (2001)A free but efficient class AB two-stage operational amplifier., , , and . ISCAS, IEEE, (2006)Comparison of programmable linear resistors based on quasi-floating gate MOSFETs., , , , , and . ISCAS, page 1712-1715. IEEE, (2008)A -72 dB @ 2 MHz IM3 CMOS tunable pseudo-differential transconductor., , , , and . ISCAS, page 73-76. IEEE, (2008)