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BRB: Mitigating Branch Predictor Side-Channels., , , , , and . HPCA, page 466-477. IEEE, (2019)SynchroTrace: Synchronization-Aware Architecture-Agnostic Traces for Lightweight Multicore Simulation of CMP and HPC Workloads., , , , , , , and . ACM Trans. Archit. Code Optim., 15 (1): 2:1-2:26 (2018)Delegated persist ordering., , , , , , , and . MICRO, page 58:1-58:13. IEEE Computer Society, (2016)The TURBO Diaries: Application-controlled Frequency Scaling Explained., , , , , and . Software Engineering & Management, volume P-239 of LNI, page 141-142. GI, (2015)Persistent Atomics for Implementing Durable Lock-Free Data Structures for Non-Volatile Memory (Brief Announcement)., and . SPAA, page 309-311. ACM, (2019)Brief announcement: between all and nothing - versatile aborts in hardware transactional memory., , , and . SPAA, page 108-110. ACM, (2013)Software Wear Management for Persistent Memories., , , , , , and . FAST, page 45-63. USENIX Association, (2019)Relaxed Persist Ordering Using Strand Persistency., , , , , and . ISCA, page 652-665. IEEE, (2020)Elastic traces for fast and accurate system performance exploration., , and . ISPASS, page 147-148. IEEE Computer Society, (2016)Composing lifetime enhancing techniques for non-volatile main memories., , , and . MEMSYS, page 363-373. ACM, (2017)