Author of the publication

Application-specific Network-on-Chip synthesis: Cluster generation and network component insertion.

, , , , , and . ISQED, page 144-149. IEEE, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

VLSI layout hotspot detection based on discriminative feature extraction., , , and . APCCAS, page 542-545. IEEE, (2016)Voltage-island driven floorplanning considering level-shifter positions., , , and . ACM Great Lakes Symposium on VLSI, page 51-56. ACM, (2009)GAN-OPC: mask optimization with lithography-guided generative adversarial nets., , , , and . DAC, page 131:1-131:6. ACM, (2018)The emotional world of health online communities.. iConference, page 806-807. ACM, (2011)A learning bridge from architectural synthesis to physical design for exploring power efficient high-performance adders., , , and . ISLPED, page 1-6. IEEE, (2017)A Configuration Tool to Increase Product Competitiveness, and . IEEE Intelligent Systems, (July 1998)A high-performance triple patterning layout decomposer with balanced density., , , , , and . ICCAD, page 163-169. IEEE, (2013)Self-aligned double patterning layout decomposition with complementary e-beam lithography., , and . ASP-DAC, page 143-148. IEEE, (2014)Machine learning and pattern matching in physical design., , , and . ASP-DAC, page 286-293. IEEE, (2015)Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (5): 726-739 (2015)