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A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications.

X. Iturbe, B. Venu, E. Ozer, and S. Das. DSN Workshops, page 246-249. IEEE Computer Society, (2016)

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Romy Das

Bio-economic modeling of soil resource conservation in Mid Hill Region of NepalR. Das. Uni Gießen, (2009)

Anita Das

Arabindo Das

Amitabh Das

Kamalendu Das

Other publications of authors with the same name

A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation.S. Das, G. Dasika, K. Shivashankar, and D. Bull. CICC, page 1-4. IEEE, (2013)Reducing pipeline energy demands with local DVS and dynamic retiming.S. Lee, S. Das, T. Pham, T. Austin, D. Blaauw, and T. Mudge. ISLPED, page 319-324. ACM, (2004)A System-Level Voltage/Frequency Scaling Characterization Framework for Multicore CPUs.G. Papadimitriou, M. Kaliorakis, A. Chatzidimitriou, D. Gizopoulos, G. Favor, K. Sankaran, and S. Das. CoRR, (2021)System technology co-optimization and design challenges for 3D IC.S. Jeloka, B. Cline, S. Das, B. Labbe, A. Rico, R. Herberholz, J. DeLaCruz, R. Mathur, and S. Hung. CICC, page 1-6. IEEE, (2022)Training DNN IoT Applications for Deployment On Analog NVM Crossbars.F. García-Redondo, S. Das, and G. Rosendale. IJCNN, page 1-8. IEEE, (2020)Frequency and time domain analysis of power delivery network for monolithic 3D ICs.K. Chang, S. Das, S. Sinha, B. Cline, G. Yeric, and S. Lim. ISLPED, page 1-6. IEEE, (2017)Optimal Inductance for On-chip RLC Interconnections.S. Das, K. Agarwal, D. Blaauw, and D. Sylvester. ICCD, page 264-. IEEE Computer Society, (2003)Leveraging CPU Electromagnetic Emanations for Voltage Noise Characterization.Z. Hadjilambrou, S. Das, M. Antoniades, and Y. Sazeides. MICRO, page 573-585. IEEE Computer Society, (2018)Applications of Computation-In-Memory Architectures based on Memristive Devices.S. Hamdioui, H. Nguyen, M. Taouil, A. Sebastian, M. Gallo, S. Pande, S. Schaafsma, F. Catthoor, S. Das, F. García-Redondo and 3 other author(s). DATE, page 486-491. IEEE, (2019)A Low-Energy Inductive Transceiver using Spike-Latency Encoding for Wireless 3D Integration.B. Fletcher, S. Das, and T. Mak. ISLPED, page 1-6. IEEE, (2019)

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Disambiguation of "Das, Shidhartha"

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A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications.

Please choose a person to relate this publication to

Romy Das

Anita Das

Arabindo Das

Amitabh Das

Kamalendu Das

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Das, Shidhartha"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications.

Please choose a person to relate this publication to

Romy Das

Anita Das

Arabindo Das

Amitabh Das

Kamalendu Das

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications.