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Maximum power supply noise estimation in VLSI circuits using multimodal genetic algorithms.

, , and . ICECS, page 1437-1440. IEEE, (2001)

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Analytical estimation of signal transition activity from word-level statistics., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (7): 718-733 (1997)Architectural and compiler techniques for energy reduction in high-performance microprocessors., , , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (3): 317-326 (2000)Monte-Carlo approach for power estimation in sequential circuits., , and . ED&TC, page 416-420. IEEE Computer Society, (1997)An analytical model for delay and crosstalk estimation in interconnects under general switching conditions., and . ICECS, page 831-834. IEEE, (2000)Estimation of state line statistics in sequential circuits., , and . ACM Trans. Design Autom. Electr. Syst., 7 (3): 455-473 (2002)High-performance bidirectional repeaters., and . ACM Great Lakes Symposium on VLSI, page 53-58. ACM, (2000)An optimization technique for dual-output domino logic., , and . ISLPED, page 258-260. ACM, (1999)ACCORD: Automatic Catching and CORrection of Logic Design Errors in Combinatorial Circuits., and . ITC, page 742-751. IEEE Computer Society, (1992)Computation of bus current variance for reliability estimation of VLSI circuits., , and . ICCAD, page 202-205. IEEE Computer Society, (1989)Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits., , and . ISCAS, page 435-438. IEEE, (1994)