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Bounding Supply Noise Induced Path Delay Variation Using a Relaxation Approach., and . VLSI Design, page 349-354. IEEE Computer Society, (2006)Convergence Issues in Resonant Tunneling Diode Circuit Simulation., and . VLSI Design, page 499-. IEEE Computer Society, (2000)Efficient and passive modeling of transmission lines by using differential quadrature method., and . DATE, page 437-444. IEEE Computer Society, (2001)Optimal Transistor Tapering for High-Speed CMOS Circuits., and . DATE, page 708-713. IEEE Computer Society, (2002)Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling., and . DATE, page 1038-1043. IEEE Computer Society, (2002)Genetic Beam Search for Gate Matrix Layout., , , and . VLSI Design, page 208-213. IEEE Computer Society, (1993)Efficient crosstalk noise modeling using aggressor and tree reductions., , and . ICCAD, page 595-600. ACM / IEEE Computer Society, (2002)A novel built-in self-repair approach to VLSI memory yield enhancement., and . ITC, page 833-841. IEEE Computer Society, (1990)A new built-in self-repair approach to VLSI memory yield enhancement by using neural-type circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (1): 124-136 (1993)New logic circuits consisting of quantum dots and CMOS., and . ECCTD, page 135-138. IEEE, (2005)