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Improving Locality Using Loop and Data Transformations in an Integrated Framework.

, , , and . MICRO, page 285-297. ACM/IEEE Computer Society, (1998)

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Functional abstraction of logic gates for switch-level simulation., , , and . EURO-DAC, page 329-333. EEE Computer Society, (1991)Streaming Implementation of the ZLIB Decoder Algorithm on an FPGA., , and . ISCAS, page 2329-2332. IEEE, (2009)Processor Tagged Descriptors: A Data Structure for Compiling for Distributed-Memory Multicomputers., , and . IFIP PACT, volume A-50 of IFIP Transactions, page 123-132. North-Holland, (1994)Global optimization techniques for automatic parallelization of hybrid applications., and . ICS, page 166-180. ACM, (2001)Potential-NRG: Placement with Incomplete Data., , and . DAC, page 279-282. ACM Press, (1998)Optimization by Simulated Evolution with Applications to Standard Cell Placement., and . DAC, page 20-25. IEEE Computer Society Press, (1990)Design and Analysis of Software Reconfiguration Strategies for Hypercube Multicomputers under Multiple Faults., and . FTCS, page 448-455. IEEE Computer Society, (1992)Distributed algorithms for shortest-path, deadlock-free routing and broadcasting in arbitrarily faulty hypercubes., and . FTCS, page 218-225. IEEE Computer Society, (1990)Macro-models for high level area and power estimation on FPGAs., , and . ACM Great Lakes Symposium on VLSI, page 162-165. ACM, (2004)A parallel simulated annealing algorithm for channel routing on a hypercube multiprocessor., and . ICCD, page 4-7. IEEE, (1988)