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CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation., , , , and . IEEE J. Solid State Circuits, 47 (11): 2701-2710 (2012)High-Efficiency Charge-Pump Circuits which Use a 0.5Vdd-Step Pumping Method., , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 86-A (2): 371-380 (2003)IEEE754 Binary32 Floating-Point Logarithmic Algorithms Based on Taylor-Series Expansion with Mantissa Region Conversion and Division., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 105-A (7): 1020-1027 (2022)Revisit to Histogram Method for ADC Linearity Test: Examination of Input Signal and Ratio of Input and Sampling Frequencies., , , , , , , , , and 2 other author(s). J. Electron. Test., 38 (1): 21-38 (2022)Analysis of Coupled Inductors for Low-Ripple Fast-Response Buck Converter., , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 92-A (2): 451-455 (2009)A Practical Analog BIST Cooperated with an LSI Tester., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (2): 465-468 (2006)Image processing regularization filters on layered architecture., , , and . Neural Networks, 6 (3): 327-350 (1993)Spatial and temporal stability of vision chips including parasitic inductances and capacitances., and . ICASSP, page 1081-1084. IEEE, (1998)Study of Rauch Low-Pass Filters using Pascal's Triangle., , and . ICEIC, page 1-4. IEEE, (2021)Analysis and Design of Multi-Tone Signal Generation Algorithms for Reducing Crest Factor., , , , , and . ATS, page 1-6. IEEE, (2020)