( en | de | ru )

 

Disambiguation of "Behnam, Moris"

Author of the publication

copydeleteadd this publication to your clipboard
SIRAP: a synchronization protocol for hierarchical resource sharingin real-time open systems.

, , , and . EMSOFT, page 279-288. ACM, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Behnam Norouzizadeh

Some aspects on coarse homotopy theory. Uni Göttingen, (2009)

Moris Lehner

Arnaud Moris

Behnam Hessabi

Behnam Soleimani

 

Other publications of authors with the same name

Resource Allocation in Industrial Cloud Computing Using Artificial Intelligence Algorithms., , , and . SCAI, volume 278 of Frontiers in Artificial Intelligence and Applications, page 128-136. IOS Press, (2015)Adaptive hierarchical scheduling framework: Configuration and evaluation., , and . ETFA, page 1-10. IEEE, (2013)Towards implementing multi-resource server on multi-core Linux platform., , , , and . ETFA, page 1-4. IEEE, (2013)On optimal real-time subsystem-interface generation in the presence of shared resources., , and . ETFA, page 1-8. IEEE, (2010)Multi-level hierarchical scheduling in ethernet switches., , , , and . EMSOFT, page 185-194. ACM, (2011)Software architecture for next generation hyperparallel cyber-physical hardware platforms: challenges and opportunities., , , and . ECSA Workshops, page 19:1-19:4. ACM, (2015)Hierarchical server-based traffic scheduling in ethernet switches., , , , and . SIGBED Review, 8 (1): 68-69 (2011)A dependency-graph based priority assignment algorithm for real-time traffic over NoCs with shared virtual-channels., , , and . WFCS, page 1-8. IEEE, (2016)Tighter time analysis for real-time traffic in on-chip networks with shared priorities., , , and . NOCS, page 1-8. IEEE, (2016)Scheduling multi-rate real-time applications on clustered many-core architectures with memory constraints., , , , and . ASP-DAC, page 560-567. IEEE, (2018)