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Software-Level Instruction-Cache Leakage Reduction Using Value-Dependence of SRAM Leakage in Nanometer Technologies., , and . Trans. High Perform. Embed. Archit. Compil., (2011)By-Software Branch Prediction in Loops., , , , , , , and . IEEE Comput. Archit. Lett., 22 (2): 129-132 (July 2023)Using Data Variety for Efficient Progressive Big Data Processing in Warehouse-Scale Computers., and . IEEE Comput. Archit. Lett., 16 (2): 166-169 (2017)Row/column redundancy to reduce SRAM leakage in presence of random within-die delay variation., and . ISLPED, page 93-98. ACM, (2008)Performance analysis of Android underlying virtual machine in mobile phones., , and . ICCE-Berlin, page 292-295. IEEE, (2012)Efficient periodic clock calculus in latency-insensitive design., , and . ICECS, page 546-549. IEEE, (2011)Efficient Data Streaming for a Tightly-Coupled Coarse-Grained Reconfigurable Array., , , , and . IPDPS Workshops, page 435-443. IEEE, (2023)Implementation of a jpeg object-oriented ASIP: a case study on a system-level design methodology., , , and . ACM Great Lakes Symposium on VLSI, page 329-334. ACM, (2007)Variation-Aware Software Techniques for Cache Leakage Reduction Using Value-Dependence of SRAM Leakage Due to Within-Die Process Variation., , and . HiPEAC, volume 4917 of Lecture Notes in Computer Science, page 224-239. Springer, (2008)A Reconfigurable Cache Architecture for Object-Oriented Embedded Systems., , and . CCECE, page 959-962. IEEE, (2006)