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Disambiguation of "Hsu, Lisa"

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Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism.

, , , , , , , , and . CoRR, (2016)

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Gaëlle Lisack

Oleg Lisagor

Hamel Lisa

Jacob Lisakafu

Tautvydas Lisauskas

 

Other publications of authors with the same name

Pond: CXL-Based Memory Pooling Systems for Cloud Platforms., , , , , , , , , and 3 other author(s). ASPLOS (2), page 574-587. ACM, (2023)Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism., , , , , , , , and . CoRR, (2016)Address Translation for Throughput-Oriented Accelerators., , and . IEEE Micro, 35 (3): 102-113 (2015)Architectural support for address translation on GPUs: designing memory management units for CPU/GPUs with unified address spaces., , and . ASPLOS, page 743-758. ACM, (2014)Hyrax: Fail-in-Place Server Operation in Cloud Platforms., , , , , , , , , and 6 other author(s). OSDI, page 287-304. USENIX Association, (2023)Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems., , , , and . ISPASS, page 88-98. IEEE Computer Society, (2012)QoS policies and architecture for cache/memory in CMP platforms., , , , , , , , and . SIGMETRICS, page 25-36. ACM, (2007)A Case for a Flexible Scalar Unit in SIMT Architecture., , , , , , and . IPDPS, page 93-102. IEEE Computer Society, (2014)Cache Resource Allocation in Large-Scale Chip Multiprocessors.. University of Michigan, USA, (2009)Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource., , , and . PACT, page 13-22. ACM, (2006)