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A vertically integrated and interoperable multi-vendor synthesis flow for predictable noc design in nanoscale technologies.

, , , , , and . ASP-DAC, page 337-342. IEEE, (2014)

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Logic Programming approaches for routing fault-free and maximally-parallel Wavelength Routed Optical Networks on Chip (Application paper)., , , and . CoRR, (2017)A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration., , , , , , , and . DAC, page 125-130. ACM, (2006)Cost-Effective Contention Avoidance in a CMP with Shared Memory Controllers., , , , and . Euro-Par, volume 7484 of Lecture Notes in Computer Science, page 741-752. Springer, (2012)A library of dual-clock FIFOs for cost-effective and flexible MPSoC design., , and . ICSAMOS, page 20-27. IEEE, (2010)System interconnect extensions for fully transparent demand paging in low-cost MMU-less embedded systems., , , , and . ISSoC, page 1-6. IEEE, (2013)Ultra-low latency NoC testing via pseudo-random test pattern compaction., , , , and . ISSoC, page 1-6. IEEE, (2012)NoC-centric partitioning and reconfiguration technologies for the efficient sharing of multi-core programmable accelerators., and . HPCS, page 643-645. IEEE, (2015)Resource Management Policy Handling Multiple Use-Cases in MPSoC Platforms Using Constraint Programming., , and . ICLP, volume 5366 of Lecture Notes in Computer Science, page 470-484. Springer, (2008)A tool for synthesizing power-efficient and custom-tailored wavelength-routed optical rings., , , and . ASP-DAC, page 300-305. IEEE, (2017)A built-in self-testing framework for asynchronous bundled-data NoC switches resilient to delay variations., , , and . NOCS, page 1-8. IEEE, (2016)