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Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs.

, , and . FPT, page 356-359. IEEE, (2002)

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A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs., , and . FCCM, page 273-275. IEEE Computer Society, (2003)Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA., , and . FCCM, page 190-198. IEEE Computer Society, (2001)Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs., , and . FPT, page 356-359. IEEE, (2002)Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT., , and . ISSPA (2), page 283-286. IEEE, (2003)0-7803-7946-2.An FPGA-Based Image Connected Component Labeller., , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 1012-1015. Springer, (2003)Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA., , and . FCCM, page 162-172. IEEE Computer Society, (2003)A generic computer platform for efficient iris recognition., , and . ICB, page 251-256. IEEE, (2012)High Performance Biosequence Database Scanning using FPGAs., , and . ICASSP (1), page 361-364. IEEE, (2007)A Prolog-Based Hardware Development Environment., , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 370-380. Springer, (2002)High Level Programming for FPGA Based Image and Video Processing Using Hardware Skeletons., , , and . FCCM, page 219-226. IEEE Computer Society, (2001)