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SMURFF: A High-Performance Framework for Matrix Factorization Methods.

, , , , , , , , , , , , and . BNAIC/BENELEARN, volume 2491 of CEUR Workshop Proceedings, CEUR-WS.org, (2019)

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Instruction Buffering Exploration for Low Energy Embedded Processors., , , , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 409-419. Springer, (2003)Instruction Transfer And Storage Exploration for Low Energy VLIWs., , , , and . SiPS, page 292-297. IEEE, (2006)Low Power Coarse-Grained Reconfigurable Instruction Set Processor., , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 230-239. Springer, (2003)Guidelines for enhancing data locality in selected machine learning algorithms., , and . Intell. Data Anal., 23 (5): 1003-1020 (2019)A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots., , and . CASES, page 229-237. ACM, (2007)Hands-on tutorial: coarse-grained reconfigurable architectures - compilation and exploration., and . CODES+ISSS, page 575-576. ACM, (2012)Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays., , , and . LCTES, page 151-160. ACM, (2008)A High-Performance Implementation of Bayesian Matrix Factorization with Limited Communication., , , , , and . ICCS (6), volume 12142 of Lecture Notes in Computer Science, page 3-16. Springer, (2020)Instruction buffering exploration for low energy VLIWs with instruction clusters., , , , , , and . ASP-DAC, page 824-829. IEEE Computer Society, (2004)Virtual Screening on FPGA., , and . BNAIC/BENELEARN, volume 2491 of CEUR Workshop Proceedings, CEUR-WS.org, (2019)