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Другие публикации лиц с тем же именем

Self-Timed Architecture of a Reduced Instruction Set Computer., , и . Asynchronous Design Methodologies, том A-28 из IFIP Transactions, стр. 29-43. North-Holland, (1993)PRINS: Resistive CAM Processing in Storage., , и . CoRR, (2018)Sparse Matrix Multiplication On An Associative Processor., , и . CoRR, (2017)Timing optimization in logic with interconnect., , , и . SLIP, стр. 19-26. ACM, (2008)Kin: A High Performance Asynchronous Processor Architecture., и . International Conference on Supercomputing, стр. 433-440. ACM, (1998)An Extended Metastability Simulation Method for Synchronizer Characterization., и . PATMOS, том 7606 из Lecture Notes in Computer Science, стр. 42-51. Springer, (2012)Resistive Associative Processor., , , и . IEEE Comput. Archit. Lett., 14 (2): 148-151 (2015)POSTER: BioSEAL: In-Memory Biological Sequence Alignment Accelerator for Large-Scale Genomic Data., , и . PACT, стр. 459-460. IEEE, (2019)Parallel VLSI architecture for MAP turbo decoder., , и . PIMRC, стр. 384-388. IEEE, (2002)Using Scan Side Channel for Detecting IP Theft., , , и . HASP@ISCA, стр. 1:1-1:8. ACM, (2016)