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Fabrication of a magnetic tunnel junction-based 240-tile nonvolatile field-programmable gate array chip skipping wasted write operations for greedy power-reduced logic applications.

D. Suzuki, M. Natsui, A. Mochizuki, S. Miura, H. Honjo, K. Kinoshita, H. Sato, S. Ikeda, T. Endoh, H. Ohno, and T. Hanyu. IEICE Electron. Express, 10 (23): 20130772 (2013)

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Daisuke Yoshida

Yoko Suzuki

Daisuke Shibata

Daisuke Akimoto

Daisuke Mashima

Other publications of authors with the same name

Nonvolatile Field-Programmable Gate Array Using a Standard-Cell-Based Design Flow.D. Suzuki, and T. Hanyu. IEICE Trans. Inf. Syst., 104-D (8): 1111-1120 (2021)Timing Black-Box Attacks: Crafting Adversarial Examples through Timing Leaks against DNNs on Embedded Devices.T. Nakai, D. Suzuki, and T. Fujino. IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021 (3): 149-175 (2021)Simultaneous detection of breath and alcohol using breath-alcohol sensor for prevention of drunk driving.M. Sakairi, D. Suzuki, A. Nishimura, Y. Ichige, and M. Kiguchi. IEICE Electron. Express, 7 (6): 467-472 (2010)Adversarial Black-Box Attacks with Timing Side-Channel Leakage.T. Nakai, D. Suzuki, F. Omatsu, and T. Fujino. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 104-A (1): 143-151 (2021)Security Evaluations of MRSL and DRSL Considering Signal Delays.M. Saeki, and D. Suzuki. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (1): 176-183 (2008)Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction.M. Natsui, D. Suzuki, N. Sakimura, R. Nebashi, Y. Tsuji, A. Morioka, T. Sugibayashi, S. Miura, H. Honjo, K. Kinoshita and 4 other author(s). IEEE J. Solid State Circuits, 50 (2): 476-489 (2015)Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure.D. Suzuki, and T. Hanyu. MWSCAS, page 1-4. IEEE, (2015)A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques.M. Saeki, D. Suzuki, K. Shimizu, and A. Satoh. CHES, volume 5747 of Lecture Notes in Computer Science, page 189-204. Springer, (2009)A high-level synthesis method for simultaneous placement and scheduling considering data communication delay.K. Ito, and D. Suzuki. APCCAS (1), page 149-154. IEEE, (2002)Circuit optimization technique of nonvolatile logic-in-memory based lookup table circuits using magnetic tunnel junction devices.D. Suzuki, T. Oka, and T. Hanyu. Microelectron. J., (2019)

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Disambiguation of "Suzuki, Daisuke"