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Exploring active manipulation attacks on the TERO random number generator., , , , and . MWSCAS, page 1-4. IEEE, (2016)A Scalable and High Performance Elliptic Curve Processor with Resistance to Timing Attacks., , and . ITCC (1), page 538-543. IEEE Computer Society, (2005)Session 36 Overview: Hardware Security Digital Architectures and Systems Subcommittee., , and . ISSCC, page 496-497. IEEE, (2021)ShowTime: Amplifying Arbitrary CPU Timing Side Channels., , , and . AsiaCCS, page 205-217. ACM, (2023)On the Unpredictability of SPICE Simulations for Side-Channel Leakage Verification of Masked Cryptographic Circuits., , , and . DAC, page 1-6. IEEE, (2023)Compact domain-specific co-processor for accelerating module lattice-based KEM., , , , and . DAC, page 1-6. IEEE, (2020)Interactive Cosimulation with Partial Evaluation., and . DATE, page 642-647. IEEE Computer Society, (2004)Decryption Failure Attacks on IND-CCA Secure Lattice-Based Schemes., , , , , and . Public Key Cryptography (2), volume 11443 of Lecture Notes in Computer Science, page 565-598. Springer, (2019)Compact Ring-LWE Cryptoprocessor., , , , and . CHES, volume 8731 of Lecture Notes in Computer Science, page 371-391. Springer, (2014)Teaching HW/SW codesign with a Zynq ARM/FPGA SoC., , , , , and . EWME, page 63-66. IEEE, (2018)